This application claims the benefit of Korean Application No. 2002-39495, filed Jul. 8, 2002, in the Korean Intellectual Property Office.
1. Field of the Invention
The present invention relates to a polycrystalline silicon thin film used in a thin film transistor and a device using the same, and more particularly, to a polycrystalline silicon thin film used in a thin film transistor with silicon grains in a crystal growing direction which is constant and regularized, and a device using a thin film transistor fabricated using the above described polycrystalline silicon thin film.
2. Description of the Related Art
Bonding defects such as atom dangling bonds existing on crystal grain boundaries of polycrystalline silicon included in active channel regions are known to act as traps on electric charge carriers when fabricating a thin film transistor (hereinafter referred to as TFT) using polycrystalline silicon.
Therefore, size, size uniformity, number and position, and direction of crystal grains not only directly or indirectly exert a fatal influence on TFT characteristics such as threshold voltage (Vth), subthreshold slope, charge carrier mobility, leakage current and device stability, but also exert a fatal influence on uniformity of TFTs depending on the position of the crystal grains when fabricating an active matrix display substrate using TFTs.
The number of fatal crystal grain boundaries (hereinafter referred to as xe2x80x9cprimaryxe2x80x9d crystal grain boundaries) included in active channel regions of a TFT on the whole substrate of a display device can be equal to or different from each other depending on the size of the crystal grains, the inclination angle xcex8, the dimension of active channels (length (L) and width (W)) and the position of each TFT on the substrate, as illustrated in FIG. 1A and FIG. 1B.
As illustrated in FIG. 1A and FIG. 1B, characteristics of each TFT in a TFT substrate comprising two or more TFTs (type 1 transistor (TR1) and type 2 transistor (TR2)) having a source/drain direction which is perpendicular to each other have different effects of crystal grain boundaries depending on a degree at which the crystal grain boundaries are perpendicular to the source/drain direction or a degree of inclination to a normal line perpendicular to the source/drain direction, wherein crystal grain boundaries having a fatal influence on characteristics of two shaped TFTs, which are perpendicular to each other, are approximately perpendicular. That is, the size of crystal grains having a fatal influence on TFT characteristics in the type 1 transistor (TR1) becomes Gs1 while the size of crystal grains having fatal influence on TFT characteristics in the type 2 transistor (TR2) becomes Gs2.
The number of crystal grain boundaries included in active channel regions of each TFT can be varied depending on the size and direction of crystal the grains, and the TFT dimensions. For example, three fatal crystal grain boundaries exist in a type 1 transistor (TR1), and two crystal grain boundaries exist in a type 2 transistor (TR2) in FIG. 1A, while three crystal grain boundaries can be contained in a type 1 transistor (TR1), and two crystal grain boundaries can be contained in a type 2 transistor (TR2) for the equal crystal grain boundaries and TFT dimensions. Therefore, uniformity of characteristics between TFTs is greatly influenced.
Polycrystalline or single crystalline particles can form large silicon grains on a substrate using sequential lateral solidification (SLS) crystallization technology, as illustrated in FIG. 2A and FIG. 2B. It is reported that a TFT fabricated using the large silicon grains can obtain similar characteristics to that of a TFT fabricated using single crystalline silicon.
However, numerous TFTs used in drivers and pixel arrays should be fabricated in order to fabricate an active matrix display.
For example, approximately a million pixels are required in fabricating an active matrix display having super video graphics array (SVGA) resolution, one TFT is required in each pixel in the case of liquid crystal displays (LCD), and two or more TFTs in each pixel are required in a display using an organic light emitting substance, e.g., an organic electroluminescent device.
Therefore, it is impossible to fabricate TFTs by growing a certain number of crystal grains only in one to two million or more active channel regions of each TFT in a certain direction.
In order to supplement these problems, it is disclosed in PCT International Patent No. WO 97/45827 that the amorphous silicon on the whole substrate is converted into polycrystalline silicon, or only selected regions on the substrate are crystallized using SLS technology after depositing amorphous silicon by plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD) or sputtering (FIG. 2A and FIG. 2B).
The selected regions are also considerably wide regions compared with active channel regions having dimensions of several xcexcmxc3x97several xcexcm. Furthermore, the size of a laser beam used in SLS technology is approximately several xcexcmxc3x97several xcexcm so that stepping and shifting of the laser beam or the stage of the laser beam are inevitably required to crystallize amorphous silicon of the whole regions or selected regions on a substrate, wherein misalignment exists between regions on which a laser beam is irradiated. Therefore, the number of xe2x80x9cprimaryxe2x80x9d crystal grain boundaries included in numerous active channel regions of a TFT is varied, and the TFT on the whole substrate, in driver regions or in pixel cell regions has unpredictable non-uniformity. The non-uniformity can exert a fatal bad influence on the realization of an active matrix display device.
Furthermore, it is disclosed in U.S. Pat. No. 6,177,391 that a barrier effect of the crystal grain boundaries for the direction of electric charge carriers is minimized (FIG. 3A), and TFT characteristics being second to single crystalline silicon is obtained accordingly in the case where the direction of active channels is parallel to the direction of crystal grains grown by the SLS crystallization method when fabricating a TFT for an LCD comprising a driver and a pixel array by forming large silicon grains using an SLS crystallization technology while a lot of the crystal grain boundaries in which the TFT characteristics act as a trap for the electric charge carriers exist, and the TFT characteristics are greatly deteriorated in the case where the active channel direction is perpendicular to the crystal grain growing direction (FIG. 3B).
There are cases where a TFT inside the driver circuit and a TFT inside pixel cell regions usually have an angle of 90xc2x0 when actually fabricating an active matrix display, wherein uniformity of the device can be improved by fabricating the active matrix display in such a way that a direction of the active channel region is inclined at a growing angle of the crystal grains by 30 to 60xc2x0 to improve uniformity of characteristics between TFTs while not greatly deteriorating the characteristics of each TFT, as illustrated in FIG. 3C.
However, there is the probability that fatal crystal grain boundaries are included in the active channel regions as the method also uses crystal grains of a limited size formed by the SLS crystallization technology. Accordingly, the method has problems in that unpredictable non-uniformity causing differences of characteristics between TFTs exist.
Accordingly, it is an object of the present invention to provide a polycrystalline silicon thin film comprising TFTs that are perpendicular to each other to be capable of determining optimum process conditions on the size and the direction of silicon crystal grains and optimum dimensions of active channels to secure TFT characteristics and uniformity required when fabricating a TFT substrate and an active display device by inducing a numerical expression capable of calculating probability in which the maximum number of xe2x80x9cprimaryxe2x80x9d crystal grain boundaries in active channel regions discriminating uniformity of the TFT characteristics during fabrication of the TFT substrate is included, and a device using an active matrix TFT fabricated using the polycrystalline silicon thin film.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
The foregoing and/or other aspects of the present invention are achieved by providing a polycrystalline silicon thin film of a TFT characterized in that probabilities P1 and P2, in which the maximum number of respective primary crystal grain boundaries for transistors TR1 and TR2 that are arranged perpendicularly to each other can be contained in active channel regions, are represented as in the following Expressions 1 and 2, and P1 or P2 is not 0.5:
P1=(D1xe2x88x92(Nmax1xe2x88x921)xc3x97Gs1)/Gs1xe2x80x83xe2x80x83Expression 1
P2=(D2xe2x88x92(Nmax2xe2x88x921)xc3x97Gs2)/Gs2xe2x80x83xe2x80x83Expression 2
where D1=L1 cos xcex8+W1 sin xcex8, D2=L2 cos xcex8+W2 sin xcex8, L1 and L2 are length of active channels of the transistors TR1 and TR2, W1 and W2 are widths of active channels of the transistors TR1 and TR2, Nmax1 and Nmax2 are the maximum numbers of the xe2x80x9cprimaryxe2x80x9d crystal grain boundaries that can be contained in the active channel regions for each of the transistors TR1 and TR2, Gs1 and Gs2 are crystal grain sizes having a fatal effect on characteristics of each of the transistors TR1 and TR2, and xcex8 is an angle in which the xe2x80x9cprimaryxe2x80x9d crystal grain boundaries are inclined at a direction perpendicular to an active channel direction of the respective transistors TR1 and TR2.
Furthermore, the present invention provides a polycrystalline silicon thin film of a TFT characterized in that probabilities containing the maximum number of respective primary crystal grain boundaries for transistors TR1 and TR2 that are arranged perpendicularly to each other are represented as a remaining distance ratio in which a distance occupied by the maximum numberxe2x88x921 crystal grains of the primary crystal grain boundaries is subtracted from a crystal grain size in a long axis direction of the active channel regions of a TFT substrate, and the probability P1 or P2 is not 0.5.
Furthermore, the present invention provides a device characterized in that an active matrix TFT using the polycrystalline silicon thin film fabricated by the present invention is used.